IP means Intellectual Property which is protected by law with special rights, enforced in types like copyright, patents, trademarks or trade secrets. In VLSI, IP’s are mostly re-used into multiple SoC’s by taking the rights from its vendor. IP’s are available in different variants like Digital IP, Analog IP, Memory IP & Mixed-Signal IP. Digital IP’s are Core Units, DSP, Memory controller, display controller etc., Analog IP’s are PLL, DLL, RF, IO pads, Voltage regulators, Power management Units, Thermal management units etc., Memory IP’s are RAM, ROM, SDRAM, SRAM etc., Mixed-Signal IP’s are ADC, DAC, interconnect sockets, interface protocols etc.,

The block specifications are obtained from the SoC/Full chip architecture. These block specification can be like the clock generation units, their operating frequency, their operating voltages, sink/source currents, impedance requirements etc., From the available block specifications, the analog circuit schematic is developed with all the characteristics implemented. After the analog schematic design, the SPICE simulation is carried on the circuit to estimate the output characteristics & improve them to match to the customer/soc requirements.

The analog circuit schematic is pushed for the custom layout implementation. The eda tools are used to perform the custom layout activities. Custom layout team does the floorplan, power planning, placement, custom routing of the internal signals. After obtaining the layout, the simulations are carried for timing, analog characteristics, library development of IP etc., This Analog IP package is dropped to the customer/soc for integration at their level. The analog team maintains the drop in versions with subsequent absorption of feedback from them.